The ESI data ingested by github.com/linuxcnc-ethercat/esi-data describes 3 revision(s) of this hardware. Here are the known revisions and their differences.
This also includes the send and receive PDOs defined for each revision, and a link to other known devices with identical PDOs.
| Revision | r16 |
r17 |
r18 |
|
| Name | EL1259 8Ch. Dig Input 24V/8Ch. Dig. Output 24V with Multi-Time-Stamp |
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| PID | 0x04eb3052 |
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| Revision Code | 0x00100000 |
0x00110000 |
0x00120000 |
|
| Equivalant Devices | ||||
| TX PDOs | 0x1a00: MTO Inputs Channel 1 |
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0x6000:01 Status__Output short circuit BOOL |
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0x6000:02 Status__Output buffer overflow BOOL |
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0x6000:03 Status__Output state BOOL |
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0x6000:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6000:11 Status__Output order feedback USINT (8 bits) |
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0x6000:12 Status__Events in output buffer USINT (8 bits) |
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0x1a01: MTO Inputs Channel 2 |
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0x6010:01 Status__Output short circuit BOOL |
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0x6010:02 Status__Output buffer overflow BOOL |
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0x6010:03 Status__Output state BOOL |
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0x6010:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6010:11 Status__Output order feedback USINT (8 bits) |
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0x6010:12 Status__Events in output buffer USINT (8 bits) |
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0x1a02: MTO Inputs Channel 3 |
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0x6020:01 Status__Output short circuit BOOL |
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0x6020:02 Status__Output buffer overflow BOOL |
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0x6020:03 Status__Output state BOOL |
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0x6020:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6020:11 Status__Output order feedback USINT (8 bits) |
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0x6020:12 Status__Events in output buffer USINT (8 bits) |
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0x1a03: MTO Inputs Channel 4 |
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0x6030:01 Status__Output short circuit BOOL |
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0x6030:02 Status__Output buffer overflow BOOL |
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0x6030:03 Status__Output state BOOL |
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0x6030:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6030:11 Status__Output order feedback USINT (8 bits) |
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0x6030:12 Status__Events in output buffer USINT (8 bits) |
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0x1a04: MTO Inputs Channel 5 |
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0x6040:01 Status__Output short circuit BOOL |
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0x6040:02 Status__Output buffer overflow BOOL |
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0x6040:03 Status__Output state BOOL |
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0x6040:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6040:11 Status__Output order feedback USINT (8 bits) |
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0x6040:12 Status__Events in output buffer USINT (8 bits) |
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0x1a05: MTO Inputs Channel 6 |
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0x6050:01 Status__Output short circuit BOOL |
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0x6050:02 Status__Output buffer overflow BOOL |
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0x6050:03 Status__Output state BOOL |
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0x6050:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6050:11 Status__Output order feedback USINT (8 bits) |
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0x6050:12 Status__Events in output buffer USINT (8 bits) |
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0x1a06: MTO Inputs Channel 7 |
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0x6060:01 Status__Output short circuit BOOL |
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0x6060:02 Status__Output buffer overflow BOOL |
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0x6060:03 Status__Output state BOOL |
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0x6060:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6060:11 Status__Output order feedback USINT (8 bits) |
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0x6060:12 Status__Events in output buffer USINT (8 bits) |
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0x1a07: MTO Inputs Channel 8 |
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0x6070:01 Status__Output short circuit BOOL |
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0x6070:02 Status__Output buffer overflow BOOL |
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0x6070:03 Status__Output state BOOL |
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0x6070:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6070:11 Status__Output order feedback USINT (8 bits) |
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0x6070:12 Status__Events in output buffer USINT (8 bits) |
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0x1a08: MTI Inputs 10x Channel 1 |
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0x6081:01 Status__No of input events USINT (8 bits) |
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0x6081:09 Status__Input state BOOL |
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0x6081:0a Status__Input buffer overflow BOOL |
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0x6081:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6081:11 Status__Events in input buffer USINT (8 bits) |
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0x6081:12 Status__Input order feedback USINT (8 bits) |
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0x6081:21 Inputs__Input event state 1 BOOL |
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0x6081:22 Inputs__Input event state 2 BOOL |
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0x6081:23 Inputs__Input event state 3 BOOL |
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0x6081:24 Inputs__Input event state 4 BOOL |
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0x6081:25 Inputs__Input event state 5 BOOL |
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0x6081:26 Inputs__Input event state 6 BOOL |
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0x6081:27 Inputs__Input event state 7 BOOL |
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0x6081:28 Inputs__Input event state 8 BOOL |
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0x6081:29 Inputs__Input event state 9 BOOL |
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0x6081:2a Inputs__Input event state 10 BOOL |
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0x6081:41 Input event time 1 UDINT (32 bits) |
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0x6081:42 Input event time 2 UDINT (32 bits) |
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0x6081:43 Input event time 3 UDINT (32 bits) |
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0x6081:44 Input event time 4 UDINT (32 bits) |
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0x6081:45 Input event time 5 UDINT (32 bits) |
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0x6081:46 Input event time 6 UDINT (32 bits) |
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0x6081:47 Input event time 7 UDINT (32 bits) |
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0x6081:48 Input event time 8 UDINT (32 bits) |
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0x6081:49 Input event time 9 UDINT (32 bits) |
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0x6081:4a Input event time 10 UDINT (32 bits) |
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0x1a09: MTI Inputs 5x Channel 1 |
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0x6081:01 Status__No of input events USINT (8 bits) |
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0x6081:09 Status__Input state BOOL |
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0x6081:0a Status__Input buffer overflow BOOL |
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0x6081:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6081:11 Status__Events in input buffer USINT (8 bits) |
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0x6081:12 Status__Input order feedback USINT (8 bits) |
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0x6081:21 Inputs__Input event state 1 BOOL |
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0x6081:22 Inputs__Input event state 2 BOOL |
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0x6081:23 Inputs__Input event state 3 BOOL |
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0x6081:24 Inputs__Input event state 4 BOOL |
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0x6081:25 Inputs__Input event state 5 BOOL |
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0x6081:41 Input event time 1 UDINT (32 bits) |
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0x6081:42 Input event time 2 UDINT (32 bits) |
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0x6081:43 Input event time 3 UDINT (32 bits) |
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0x6081:44 Input event time 4 UDINT (32 bits) |
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0x6081:45 Input event time 5 UDINT (32 bits) |
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0x1a0a: MTI Inputs 2x Channel 1 |
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0x6081:01 Status__No of input events USINT (8 bits) |
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0x6081:09 Status__Input state BOOL |
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0x6081:0a Status__Input buffer overflow BOOL |
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0x6081:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6081:11 Status__Events in input buffer USINT (8 bits) |
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0x6081:12 Status__Input order feedback USINT (8 bits) |
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0x6081:21 Inputs__Input event state 1 BOOL |
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0x6081:22 Inputs__Input event state 2 BOOL |
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0x6081:41 Input event time 1 UDINT (32 bits) |
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0x6081:42 Input event time 2 UDINT (32 bits) |
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0x1a0b: MTI Inputs 1x Channel 1 |
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0x6081:01 Status__No of input events USINT (8 bits) |
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0x6081:09 Status__Input state BOOL |
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0x6081:0a Status__Input buffer overflow BOOL |
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0x6081:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6081:11 Status__Events in input buffer USINT (8 bits) |
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0x6081:12 Status__Input order feedback USINT (8 bits) |
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0x6081:21 Inputs__Input event state 1 BOOL |
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0x6081:41 Input event time 1 UDINT (32 bits) |
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0x1a0c: MTI Inputs 10x Channel 2 |
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0x6091:01 Status__No of input events USINT (8 bits) |
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0x6091:09 Status__Input state BOOL |
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0x6091:0a Status__Input buffer overflow BOOL |
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0x6091:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6091:11 Status__Events in input buffer USINT (8 bits) |
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0x6091:12 Status__Input order feedback USINT (8 bits) |
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0x6091:21 Inputs__Input event state 1 BOOL |
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0x6091:22 Inputs__Input event state 2 BOOL |
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0x6091:23 Inputs__Input event state 3 BOOL |
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0x6091:24 Inputs__Input event state 4 BOOL |
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0x6091:25 Inputs__Input event state 5 BOOL |
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0x6091:26 Inputs__Input event state 6 BOOL |
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0x6091:27 Inputs__Input event state 7 BOOL |
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0x6091:28 Inputs__Input event state 8 BOOL |
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0x6091:29 Inputs__Input event state 9 BOOL |
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0x6091:2a Inputs__Input event state 10 BOOL |
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0x6091:41 Input event time 1 UDINT (32 bits) |
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0x6091:42 Input event time 2 UDINT (32 bits) |
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0x6091:43 Input event time 3 UDINT (32 bits) |
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0x6091:44 Input event time 4 UDINT (32 bits) |
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0x6091:45 Input event time 5 UDINT (32 bits) |
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0x6091:46 Input event time 6 UDINT (32 bits) |
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0x6091:47 Input event time 7 UDINT (32 bits) |
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0x6091:48 Input event time 8 UDINT (32 bits) |
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0x6091:49 Input event time 9 UDINT (32 bits) |
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0x6091:4a Input event time 10 UDINT (32 bits) |
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0x1a0d: MTI Inputs 5x Channel 2 |
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0x6091:01 Status__No of input events USINT (8 bits) |
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0x6091:09 Status__Input state BOOL |
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0x6091:0a Status__Input buffer overflow BOOL |
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0x6091:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6091:11 Status__Events in input buffer USINT (8 bits) |
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0x6091:12 Status__Input order feedback USINT (8 bits) |
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0x6091:21 Inputs__Input event state 1 BOOL |
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0x6091:22 Inputs__Input event state 2 BOOL |
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0x6091:23 Inputs__Input event state 3 BOOL |
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0x6091:24 Inputs__Input event state 4 BOOL |
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0x6091:25 Inputs__Input event state 5 BOOL |
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0x6091:41 Input event time 1 UDINT (32 bits) |
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0x6091:42 Input event time 2 UDINT (32 bits) |
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0x6091:43 Input event time 3 UDINT (32 bits) |
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0x6091:44 Input event time 4 UDINT (32 bits) |
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0x6091:45 Input event time 5 UDINT (32 bits) |
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0x1a0e: MTI Inputs 2x Channel 2 |
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0x6091:01 Status__No of input events USINT (8 bits) |
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0x6091:09 Status__Input state BOOL |
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0x6091:0a Status__Input buffer overflow BOOL |
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0x6091:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6091:11 Status__Events in input buffer USINT (8 bits) |
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0x6091:12 Status__Input order feedback USINT (8 bits) |
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0x6091:21 Inputs__Input event state 1 BOOL |
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0x6091:22 Inputs__Input event state 2 BOOL |
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0x6091:41 Input event time 1 UDINT (32 bits) |
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0x6091:42 Input event time 2 UDINT (32 bits) |
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0x1a0f: MTI Inputs 1x Channel 2 |
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0x6091:01 Status__No of input events USINT (8 bits) |
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0x6091:09 Status__Input state BOOL |
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0x6091:0a Status__Input buffer overflow BOOL |
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0x6091:0f Status__Input cycle counter BIT2 (2 bits) |
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0x6091:11 Status__Events in input buffer USINT (8 bits) |
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0x6091:12 Status__Input order feedback USINT (8 bits) |
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0x6091:21 Inputs__Input event state 1 BOOL |
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0x6091:41 Input event time 1 UDINT (32 bits) |
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0x1a10: MTI Inputs 10x Channel 3 |
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0x60a1:01 Status__No of input events USINT (8 bits) |
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0x60a1:09 Status__Input state BOOL |
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0x60a1:0a Status__Input buffer overflow BOOL |
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0x60a1:0f Status__Input cycle counter BIT2 (2 bits) |
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0x60a1:11 Status__Events in input buffer USINT (8 bits) |
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0x60a1:12 Status__Input order feedback USINT (8 bits) |
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0x60a1:21 Inputs__Input event state 1 BOOL |
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0x60a1:22 Inputs__Input event state 2 BOOL |
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0x60a1:23 Inputs__Input event state 3 BOOL |
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0x60a1:24 Inputs__Input event state 4 BOOL |
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0x60a1:25 Inputs__Input event state 5 BOOL |
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0x60a1:26 Inputs__Input event state 6 BOOL |
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0x60a1:27 Inputs__Input event state 7 BOOL |
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0x60a1:28 Inputs__Input event state 8 BOOL |
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0x60a1:29 Inputs__Input event state 9 BOOL |
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0x60a1:2a Inputs__Input event state 10 BOOL |
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0x60a1:41 Input event time 1 UDINT (32 bits) |
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0x60a1:42 Input event time 2 UDINT (32 bits) |
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0x60a1:43 Input event time 3 UDINT (32 bits) |
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0x60a1:44 Input event time 4 UDINT (32 bits) |
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0x60a1:45 Input event time 5 UDINT (32 bits) |
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0x60a1:46 Input event time 6 UDINT (32 bits) |
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0x60a1:47 Input event time 7 UDINT (32 bits) |
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0x60a1:48 Input event time 8 UDINT (32 bits) |
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0x60a1:49 Input event time 9 UDINT (32 bits) |
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0x60a1:4a Input event time 10 UDINT (32 bits) |
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0x1a11: MTI Inputs 5x Channel 3 |
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0x60a1:01 Status__No of input events USINT (8 bits) |
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0x60a1:09 Status__Input state BOOL |
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0x60a1:0a Status__Input buffer overflow BOOL |
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0x60a1:0f Status__Input cycle counter BIT2 (2 bits) |
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0x60a1:11 Status__Events in input buffer USINT (8 bits) |
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0x60a1:12 Status__Input order feedback USINT (8 bits) |
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0x60a1:21 Inputs__Input event state 1 BOOL |
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0x60a1:22 Inputs__Input event state 2 BOOL |
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0x60a1:23 Inputs__Input event state 3 BOOL |
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0x60a1:24 Inputs__Input event state 4 BOOL |
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0x60a1:25 Inputs__Input event state 5 BOOL |
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0x60a1:41 Input event time 1 UDINT (32 bits) |
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0x60a1:42 Input event time 2 UDINT (32 bits) |
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0x60a1:43 Input event time 3 UDINT (32 bits) |
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0x60a1:44 Input event time 4 UDINT (32 bits) |
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0x60a1:45 Input event time 5 UDINT (32 bits) |
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0x1a12: MTI Inputs 2x Channel 3 |
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0x60a1:01 Status__No of input events USINT (8 bits) |
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0x60a1:09 Status__Input state BOOL |
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0x60a1:0a Status__Input buffer overflow BOOL |
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0x60a1:0f Status__Input cycle counter BIT2 (2 bits) |
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0x60a1:11 Status__Events in input buffer USINT (8 bits) |
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0x60a1:12 Status__Input order feedback USINT (8 bits) |
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0x60a1:21 Inputs__Input event state 1 BOOL |
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0x60a1:22 Inputs__Input event state 2 BOOL |
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0x60a1:41 Input event time 1 UDINT (32 bits) |
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0x60a1:42 Input event time 2 UDINT (32 bits) |
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0x1a13: MTI Inputs 1x Channel 3 |
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0x60a1:01 Status__No of input events USINT (8 bits) |
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0x60a1:09 Status__Input state BOOL |
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0x60a1:0a Status__Input buffer overflow BOOL |
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0x60a1:0f Status__Input cycle counter BIT2 (2 bits) |
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0x60a1:11 Status__Events in input buffer USINT (8 bits) |
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0x60a1:12 Status__Input order feedback USINT (8 bits) |
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0x60a1:21 Inputs__Input event state 1 BOOL |
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0x60a1:41 Input event time 1 UDINT (32 bits) |
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0x1a14: MTI Inputs 10x Channel 4 |
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0x60b1:01 Status__No of input events USINT (8 bits) |
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0x60b1:09 Status__Input state BOOL |
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0x60b1:0a Status__Input buffer overflow BOOL |
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0x60b1:0f Status__Input cycle counter BIT2 (2 bits) |
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0x60b1:11 Status__Events in input buffer USINT (8 bits) |
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0x60b1:12 Status__Input order feedback USINT (8 bits) |
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0x60b1:21 Inputs__Input event state 1 BOOL |
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0x60b1:22 Inputs__Input event state 2 BOOL |
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0x60b1:23 Inputs__Input event state 3 BOOL |
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0x60b1:24 Inputs__Input event state 4 BOOL |
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0x60b1:25 Inputs__Input event state 5 BOOL |
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0x60b1:26 Inputs__Input event state 6 BOOL |
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0x60b1:27 Inputs__Input event state 7 BOOL |
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0x60b1:28 Inputs__Input event state 8 BOOL |
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0x60b1:29 Inputs__Input event state 9 BOOL |
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0x60b1:2a Inputs__Input event state 10 BOOL |
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0x60b1:41 Input event time 1 UDINT (32 bits) |
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0x60b1:42 Input event time 2 UDINT (32 bits) |
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0x60b1:43 Input event time 3 UDINT (32 bits) |
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0x60b1:44 Input event time 4 UDINT (32 bits) |
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0x60b1:45 Input event time 5 UDINT (32 bits) |
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0x60b1:46 Input event time 6 UDINT (32 bits) |
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0x60b1:47 Input event time 7 UDINT (32 bits) |
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0x60b1:48 Input event time 8 UDINT (32 bits) |
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0x60b1:49 Input event time 9 UDINT (32 bits) |
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0x60b1:4a Input event time 10 UDINT (32 bits) |
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0x1a15: MTI Inputs 5x Channel 4 |
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0x60b1:01 Status__No of input events USINT (8 bits) |
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0x60b1:09 Status__Input state BOOL |
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0x60b1:0a Status__Input buffer overflow BOOL |
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0x60b1:0f Status__Input cycle counter BIT2 (2 bits) |
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0x60b1:11 Status__Events in input buffer USINT (8 bits) |
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0x60b1:12 Status__Input order feedback USINT (8 bits) |
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0x60b1:21 Inputs__Input event state 1 BOOL |
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0x60b1:22 Inputs__Input event state 2 BOOL |
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0x60b1:23 Inputs__Input event state 3 BOOL |
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0x60b1:24 Inputs__Input event state 4 BOOL |
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0x60b1:25 Inputs__Input event state 5 BOOL |
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0x60b1:41 Input event time 1 UDINT (32 bits) |
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0x60b1:42 Input event time 2 UDINT (32 bits) |
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0x60b1:43 Input event time 3 UDINT (32 bits) |
||||
0x60b1:44 Input event time 4 UDINT (32 bits) |
||||
0x60b1:45 Input event time 5 UDINT (32 bits) |
||||
0x1a16: MTI Inputs 2x Channel 4 |
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0x60b1:01 Status__No of input events USINT (8 bits) |
||||
0x60b1:09 Status__Input state BOOL |
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0x60b1:0a Status__Input buffer overflow BOOL |
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0x60b1:0f Status__Input cycle counter BIT2 (2 bits) |
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0x60b1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60b1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60b1:21 Inputs__Input event state 1 BOOL |
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0x60b1:22 Inputs__Input event state 2 BOOL |
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0x60b1:41 Input event time 1 UDINT (32 bits) |
||||
0x60b1:42 Input event time 2 UDINT (32 bits) |
||||
0x1a17: MTI Inputs 1x Channel 4 |
||||
0x60b1:01 Status__No of input events USINT (8 bits) |
||||
0x60b1:09 Status__Input state BOOL |
||||
0x60b1:0a Status__Input buffer overflow BOOL |
||||
0x60b1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60b1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60b1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60b1:21 Inputs__Input event state 1 BOOL |
||||
0x60b1:41 Input event time 1 UDINT (32 bits) |
||||
0x1a18: MTI Inputs 10x Channel 5 |
||||
0x60c1:01 Status__No of input events USINT (8 bits) |
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0x60c1:09 Status__Input state BOOL |
||||
0x60c1:0a Status__Input buffer overflow BOOL |
||||
0x60c1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60c1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60c1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60c1:21 Inputs__Input event state 1 BOOL |
||||
0x60c1:22 Inputs__Input event state 2 BOOL |
||||
0x60c1:23 Inputs__Input event state 3 BOOL |
||||
0x60c1:24 Inputs__Input event state 4 BOOL |
||||
0x60c1:25 Inputs__Input event state 5 BOOL |
||||
0x60c1:26 Inputs__Input event state 6 BOOL |
||||
0x60c1:27 Inputs__Input event state 7 BOOL |
||||
0x60c1:28 Inputs__Input event state 8 BOOL |
||||
0x60c1:29 Inputs__Input event state 9 BOOL |
||||
0x60c1:2a Inputs__Input event state 10 BOOL |
||||
0x60c1:41 Input event time 1 UDINT (32 bits) |
||||
0x60c1:42 Input event time 2 UDINT (32 bits) |
||||
0x60c1:43 Input event time 3 UDINT (32 bits) |
||||
0x60c1:44 Input event time 4 UDINT (32 bits) |
||||
0x60c1:45 Input event time 5 UDINT (32 bits) |
||||
0x60c1:46 Input event time 6 UDINT (32 bits) |
||||
0x60c1:47 Input event time 7 UDINT (32 bits) |
||||
0x60c1:48 Input event time 8 UDINT (32 bits) |
||||
0x60c1:49 Input event time 9 UDINT (32 bits) |
||||
0x60c1:4a Input event time 10 UDINT (32 bits) |
||||
0x1a19: MTI Inputs 5x Channel 5 |
||||
0x60c1:01 Status__No of input events USINT (8 bits) |
||||
0x60c1:09 Status__Input state BOOL |
||||
0x60c1:0a Status__Input buffer overflow BOOL |
||||
0x60c1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60c1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60c1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60c1:21 Inputs__Input event state 1 BOOL |
||||
0x60c1:22 Inputs__Input event state 2 BOOL |
||||
0x60c1:23 Inputs__Input event state 3 BOOL |
||||
0x60c1:24 Inputs__Input event state 4 BOOL |
||||
0x60c1:25 Inputs__Input event state 5 BOOL |
||||
0x60c1:41 Input event time 1 UDINT (32 bits) |
||||
0x60c1:42 Input event time 2 UDINT (32 bits) |
||||
0x60c1:43 Input event time 3 UDINT (32 bits) |
||||
0x60c1:44 Input event time 4 UDINT (32 bits) |
||||
0x60c1:45 Input event time 5 UDINT (32 bits) |
||||
0x1a1a: MTI Inputs 2x Channel 5 |
||||
0x60c1:01 Status__No of input events USINT (8 bits) |
||||
0x60c1:09 Status__Input state BOOL |
||||
0x60c1:0a Status__Input buffer overflow BOOL |
||||
0x60c1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60c1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60c1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60c1:21 Inputs__Input event state 1 BOOL |
||||
0x60c1:22 Inputs__Input event state 2 BOOL |
||||
0x60c1:41 Input event time 1 UDINT (32 bits) |
||||
0x60c1:42 Input event time 2 UDINT (32 bits) |
||||
0x1a1b: MTI Inputs 1x Channel 5 |
||||
0x60c1:01 Status__No of input events USINT (8 bits) |
||||
0x60c1:09 Status__Input state BOOL |
||||
0x60c1:0a Status__Input buffer overflow BOOL |
||||
0x60c1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60c1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60c1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60c1:21 Inputs__Input event state 1 BOOL |
||||
0x60c1:41 Input event time 1 UDINT (32 bits) |
||||
0x1a1c: MTI Inputs 10x Channel 6 |
||||
0x60d1:01 Status__No of input events USINT (8 bits) |
||||
0x60d1:09 Status__Input state BOOL |
||||
0x60d1:0a Status__Input buffer overflow BOOL |
||||
0x60d1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60d1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60d1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60d1:21 Inputs__Input event state 1 BOOL |
||||
0x60d1:22 Inputs__Input event state 2 BOOL |
||||
0x60d1:23 Inputs__Input event state 3 BOOL |
||||
0x60d1:24 Inputs__Input event state 4 BOOL |
||||
0x60d1:25 Inputs__Input event state 5 BOOL |
||||
0x60d1:26 Inputs__Input event state 6 BOOL |
||||
0x60d1:27 Inputs__Input event state 7 BOOL |
||||
0x60d1:28 Inputs__Input event state 8 BOOL |
||||
0x60d1:29 Inputs__Input event state 9 BOOL |
||||
0x60d1:2a Inputs__Input event state 10 BOOL |
||||
0x60d1:41 Input event time 1 UDINT (32 bits) |
||||
0x60d1:42 Input event time 2 UDINT (32 bits) |
||||
0x60d1:43 Input event time 3 UDINT (32 bits) |
||||
0x60d1:44 Input event time 4 UDINT (32 bits) |
||||
0x60d1:45 Input event time 5 UDINT (32 bits) |
||||
0x60d1:46 Input event time 6 UDINT (32 bits) |
||||
0x60d1:47 Input event time 7 UDINT (32 bits) |
||||
0x60d1:48 Input event time 8 UDINT (32 bits) |
||||
0x60d1:49 Input event time 9 UDINT (32 bits) |
||||
0x60d1:4a Input event time 10 UDINT (32 bits) |
||||
0x1a1d: MTI Inputs 5x Channel 6 |
||||
0x60d1:01 Status__No of input events USINT (8 bits) |
||||
0x60d1:09 Status__Input state BOOL |
||||
0x60d1:0a Status__Input buffer overflow BOOL |
||||
0x60d1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60d1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60d1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60d1:21 Inputs__Input event state 1 BOOL |
||||
0x60d1:22 Inputs__Input event state 2 BOOL |
||||
0x60d1:23 Inputs__Input event state 3 BOOL |
||||
0x60d1:24 Inputs__Input event state 4 BOOL |
||||
0x60d1:25 Inputs__Input event state 5 BOOL |
||||
0x60d1:41 Input event time 1 UDINT (32 bits) |
||||
0x60d1:42 Input event time 2 UDINT (32 bits) |
||||
0x60d1:43 Input event time 3 UDINT (32 bits) |
||||
0x60d1:44 Input event time 4 UDINT (32 bits) |
||||
0x60d1:45 Input event time 5 UDINT (32 bits) |
||||
0x1a1e: MTI Inputs 2x Channel 6 |
||||
0x60d1:01 Status__No of input events USINT (8 bits) |
||||
0x60d1:09 Status__Input state BOOL |
||||
0x60d1:0a Status__Input buffer overflow BOOL |
||||
0x60d1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60d1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60d1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60d1:21 Inputs__Input event state 1 BOOL |
||||
0x60d1:22 Inputs__Input event state 2 BOOL |
||||
0x60d1:41 Input event time 1 UDINT (32 bits) |
||||
0x60d1:42 Input event time 2 UDINT (32 bits) |
||||
0x1a1f: MTI Inputs 1x Channel 6 |
||||
0x60d1:01 Status__No of input events USINT (8 bits) |
||||
0x60d1:09 Status__Input state BOOL |
||||
0x60d1:0a Status__Input buffer overflow BOOL |
||||
0x60d1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60d1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60d1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60d1:21 Inputs__Input event state 1 BOOL |
||||
0x60d1:41 Input event time 1 UDINT (32 bits) |
||||
0x1a20: MTI Inputs 10x Channel 7 |
||||
0x60e1:01 Status__No of input events USINT (8 bits) |
||||
0x60e1:09 Status__Input state BOOL |
||||
0x60e1:0a Status__Input buffer overflow BOOL |
||||
0x60e1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60e1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60e1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60e1:21 Inputs__Input event state 1 BOOL |
||||
0x60e1:22 Inputs__Input event state 2 BOOL |
||||
0x60e1:23 Inputs__Input event state 3 BOOL |
||||
0x60e1:24 Inputs__Input event state 4 BOOL |
||||
0x60e1:25 Inputs__Input event state 5 BOOL |
||||
0x60e1:26 Inputs__Input event state 6 BOOL |
||||
0x60e1:27 Inputs__Input event state 7 BOOL |
||||
0x60e1:28 Inputs__Input event state 8 BOOL |
||||
0x60e1:29 Inputs__Input event state 9 BOOL |
||||
0x60e1:2a Inputs__Input event state 10 BOOL |
||||
0x60e1:41 Input event time 1 UDINT (32 bits) |
||||
0x60e1:42 Input event time 2 UDINT (32 bits) |
||||
0x60e1:43 Input event time 3 UDINT (32 bits) |
||||
0x60e1:44 Input event time 4 UDINT (32 bits) |
||||
0x60e1:45 Input event time 5 UDINT (32 bits) |
||||
0x60e1:46 Input event time 6 UDINT (32 bits) |
||||
0x60e1:47 Input event time 7 UDINT (32 bits) |
||||
0x60e1:48 Input event time 8 UDINT (32 bits) |
||||
0x60e1:49 Input event time 9 UDINT (32 bits) |
||||
0x60e1:4a Input event time 10 UDINT (32 bits) |
||||
0x1a21: MTI Inputs 5x Channel 7 |
||||
0x60e1:01 Status__No of input events USINT (8 bits) |
||||
0x60e1:09 Status__Input state BOOL |
||||
0x60e1:0a Status__Input buffer overflow BOOL |
||||
0x60e1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60e1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60e1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60e1:21 Inputs__Input event state 1 BOOL |
||||
0x60e1:22 Inputs__Input event state 2 BOOL |
||||
0x60e1:23 Inputs__Input event state 3 BOOL |
||||
0x60e1:24 Inputs__Input event state 4 BOOL |
||||
0x60e1:25 Inputs__Input event state 5 BOOL |
||||
0x60e1:41 Input event time 1 UDINT (32 bits) |
||||
0x60e1:42 Input event time 2 UDINT (32 bits) |
||||
0x60e1:43 Input event time 3 UDINT (32 bits) |
||||
0x60e1:44 Input event time 4 UDINT (32 bits) |
||||
0x60e1:45 Input event time 5 UDINT (32 bits) |
||||
0x1a22: MTI Inputs 2x Channel 7 |
||||
0x60e1:01 Status__No of input events USINT (8 bits) |
||||
0x60e1:09 Status__Input state BOOL |
||||
0x60e1:0a Status__Input buffer overflow BOOL |
||||
0x60e1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60e1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60e1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60e1:21 Inputs__Input event state 1 BOOL |
||||
0x60e1:22 Inputs__Input event state 2 BOOL |
||||
0x60e1:41 Input event time 1 UDINT (32 bits) |
||||
0x60e1:42 Input event time 2 UDINT (32 bits) |
||||
0x1a23: MTI Inputs 1x Channel 7 |
||||
0x60e1:01 Status__No of input events USINT (8 bits) |
||||
0x60e1:09 Status__Input state BOOL |
||||
0x60e1:0a Status__Input buffer overflow BOOL |
||||
0x60e1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60e1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60e1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60e1:21 Inputs__Input event state 1 BOOL |
||||
0x60e1:41 Input event time 1 UDINT (32 bits) |
||||
0x1a24: MTI Inputs 10x Channel 8 |
||||
0x60f1:01 Status__No of input events USINT (8 bits) |
||||
0x60f1:09 Status__Input state BOOL |
||||
0x60f1:0a Status__Input buffer overflow BOOL |
||||
0x60f1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60f1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60f1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60f1:21 Inputs__Input event state 1 BOOL |
||||
0x60f1:22 Inputs__Input event state 2 BOOL |
||||
0x60f1:23 Inputs__Input event state 3 BOOL |
||||
0x60f1:24 Inputs__Input event state 4 BOOL |
||||
0x60f1:25 Inputs__Input event state 5 BOOL |
||||
0x60f1:26 Inputs__Input event state 6 BOOL |
||||
0x60f1:27 Inputs__Input event state 7 BOOL |
||||
0x60f1:28 Inputs__Input event state 8 BOOL |
||||
0x60f1:29 Inputs__Input event state 9 BOOL |
||||
0x60f1:2a Inputs__Input event state 10 BOOL |
||||
0x60f1:41 Input event time 1 UDINT (32 bits) |
||||
0x60f1:42 Input event time 2 UDINT (32 bits) |
||||
0x60f1:43 Input event time 3 UDINT (32 bits) |
||||
0x60f1:44 Input event time 4 UDINT (32 bits) |
||||
0x60f1:45 Input event time 5 UDINT (32 bits) |
||||
0x60f1:46 Input event time 6 UDINT (32 bits) |
||||
0x60f1:47 Input event time 7 UDINT (32 bits) |
||||
0x60f1:48 Input event time 8 UDINT (32 bits) |
||||
0x60f1:49 Input event time 9 UDINT (32 bits) |
||||
0x60f1:4a Input event time 10 UDINT (32 bits) |
||||
0x1a25: MTI Inputs 5x Channel 8 |
||||
0x60f1:01 Status__No of input events USINT (8 bits) |
||||
0x60f1:09 Status__Input state BOOL |
||||
0x60f1:0a Status__Input buffer overflow BOOL |
||||
0x60f1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60f1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60f1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60f1:21 Inputs__Input event state 1 BOOL |
||||
0x60f1:22 Inputs__Input event state 2 BOOL |
||||
0x60f1:23 Inputs__Input event state 3 BOOL |
||||
0x60f1:24 Inputs__Input event state 4 BOOL |
||||
0x60f1:25 Inputs__Input event state 5 BOOL |
||||
0x60f1:41 Input event time 1 UDINT (32 bits) |
||||
0x60f1:42 Input event time 2 UDINT (32 bits) |
||||
0x60f1:43 Input event time 3 UDINT (32 bits) |
||||
0x60f1:44 Input event time 4 UDINT (32 bits) |
||||
0x60f1:45 Input event time 5 UDINT (32 bits) |
||||
0x1a26: MTI Inputs 2x Channel 8 |
||||
0x60f1:01 Status__No of input events USINT (8 bits) |
||||
0x60f1:09 Status__Input state BOOL |
||||
0x60f1:0a Status__Input buffer overflow BOOL |
||||
0x60f1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60f1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60f1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60f1:21 Inputs__Input event state 1 BOOL |
||||
0x60f1:22 Inputs__Input event state 2 BOOL |
||||
0x60f1:41 Input event time 1 UDINT (32 bits) |
||||
0x60f1:42 Input event time 2 UDINT (32 bits) |
||||
0x1a27: MTI Inputs 1x Channel 8 |
||||
0x60f1:01 Status__No of input events USINT (8 bits) |
||||
0x60f1:09 Status__Input state BOOL |
||||
0x60f1:0a Status__Input buffer overflow BOOL |
||||
0x60f1:0f Status__Input cycle counter BIT2 (2 bits) |
||||
0x60f1:11 Status__Events in input buffer USINT (8 bits) |
||||
0x60f1:12 Status__Input order feedback USINT (8 bits) |
||||
0x60f1:21 Inputs__Input event state 1 BOOL |
||||
0x60f1:41 Input event time 1 UDINT (32 bits) |
||||
0x1a28: TSO Inputs Channel 1 |
||||
0x6100:01 Feedback BOOL |
||||
0x1a29: TSO Inputs Channel 2 |
||||
0x6110:01 Feedback BOOL |
||||
0x1a2a: TSO Inputs Channel 3 |
||||
0x6120:01 Feedback BOOL |
||||
0x1a2b: TSO Inputs Channel 4 |
||||
0x6130:01 Feedback BOOL |
||||
0x1a2c: TSO Inputs Channel 5 |
||||
0x6140:01 Feedback BOOL |
||||
0x1a2d: TSO Inputs Channel 6 |
||||
0x6150:01 Feedback BOOL |
||||
0x1a2e: TSO Inputs Channel 7 |
||||
0x6160:01 Feedback BOOL |
||||
0x1a2f: TSO Inputs Channel 8 |
||||
0x6170:01 Feedback BOOL |
||||
0x1a30: TSI Inputs Channel 1 |
||||
0x6180:01 Input BOOL |
||||
0x6180:09 Status USINT (8 bits) |
||||
0x6180:41 LatchPos ULINT (64 bits) |
||||
0x6180:42 LatchNeg ULINT (64 bits) |
||||
0x1a31: TSI Inputs Channel 2 |
||||
0x6190:01 Input BOOL |
||||
0x6190:09 Status USINT (8 bits) |
||||
0x6190:41 LatchPos ULINT (64 bits) |
||||
0x6190:42 LatchNeg ULINT (64 bits) |
||||
0x1a32: TSI Inputs Channel 3 |
||||
0x61a0:01 Input BOOL |
||||
0x61a0:09 Status USINT (8 bits) |
||||
0x61a0:41 LatchPos ULINT (64 bits) |
||||
0x61a0:42 LatchNeg ULINT (64 bits) |
||||
0x1a33: TSI Inputs Channel 4 |
||||
0x61b0:01 Input BOOL |
||||
0x61b0:09 Status USINT (8 bits) |
||||
0x61b0:41 LatchPos ULINT (64 bits) |
||||
0x61b0:42 LatchNeg ULINT (64 bits) |
||||
0x1a34: TSI Inputs Channel 5 |
||||
0x61c0:01 Input BOOL |
||||
0x61c0:09 Status USINT (8 bits) |
||||
0x61c0:41 LatchPos ULINT (64 bits) |
||||
0x61c0:42 LatchNeg ULINT (64 bits) |
||||
0x1a35: TSI Inputs Channel 6 |
||||
0x61d0:01 Input BOOL |
||||
0x61d0:09 Status USINT (8 bits) |
||||
0x61d0:41 LatchPos ULINT (64 bits) |
||||
0x61d0:42 LatchNeg ULINT (64 bits) |
||||
0x1a36: TSI Inputs Channel 7 |
||||
0x61e0:01 Input BOOL |
||||
0x61e0:09 Status USINT (8 bits) |
||||
0x61e0:41 LatchPos ULINT (64 bits) |
||||
0x61e0:42 LatchNeg ULINT (64 bits) |
||||
0x1a37: TSI Inputs Channel 8 |
||||
0x61f0:01 Input BOOL |
||||
0x61f0:09 Status USINT (8 bits) |
||||
0x61f0:41 LatchPos ULINT (64 bits) |
||||
0x61f0:42 LatchNeg ULINT (64 bits) |
||||
0x1a38: DEV Inputs Device |
||||
| RX PDOs | 0x1600: MTO Outputs 10x Channel 1 |
|||
0x7001:01 Ctrl__Output buffer reset BOOL |
||||
0x7001:02 Ctrl__Manual output state BOOL |
||||
0x7001:03 Ctrl__Force order BOOL |
||||
0x7001:04 Ctrl__Enable manual operation BOOL |
||||
0x7001:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7001:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7001:21 Outputs__Output event state 1 BOOL |
||||
0x7001:22 Outputs__Output event state 2 BOOL |
||||
0x7001:23 Outputs__Output event state 3 BOOL |
||||
0x7001:24 Outputs__Output event state 4 BOOL |
||||
0x7001:25 Outputs__Output event state 5 BOOL |
||||
0x7001:26 Outputs__Output event state 6 BOOL |
||||
0x7001:27 Outputs__Output event state 7 BOOL |
||||
0x7001:28 Outputs__Output event state 8 BOOL |
||||
0x7001:29 Outputs__Output event state 9 BOOL |
||||
0x7001:2a Outputs__Output event state 10 BOOL |
||||
0x7001:41 Output event time 1 UDINT (32 bits) |
||||
0x7001:42 Output event time 2 UDINT (32 bits) |
||||
0x7001:43 Output event time 3 UDINT (32 bits) |
||||
0x7001:44 Output event time 4 UDINT (32 bits) |
||||
0x7001:45 Output event time 5 UDINT (32 bits) |
||||
0x7001:46 Output event time 6 UDINT (32 bits) |
||||
0x7001:47 Output event time 7 UDINT (32 bits) |
||||
0x7001:48 Output event time 8 UDINT (32 bits) |
||||
0x7001:49 Output event time 9 UDINT (32 bits) |
||||
0x7001:4a Output event time 10 UDINT (32 bits) |
||||
0x1601: MTO Outputs 5x Channel 1 |
||||
0x7001:01 Ctrl__Output buffer reset BOOL |
||||
0x7001:02 Ctrl__Manual output state BOOL |
||||
0x7001:03 Ctrl__Force order BOOL |
||||
0x7001:04 Ctrl__Enable manual operation BOOL |
||||
0x7001:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7001:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7001:21 Outputs__Output event state 1 BOOL |
||||
0x7001:22 Outputs__Output event state 2 BOOL |
||||
0x7001:23 Outputs__Output event state 3 BOOL |
||||
0x7001:24 Outputs__Output event state 4 BOOL |
||||
0x7001:25 Outputs__Output event state 5 BOOL |
||||
0x7001:41 Output event time 1 UDINT (32 bits) |
||||
0x7001:42 Output event time 2 UDINT (32 bits) |
||||
0x7001:43 Output event time 3 UDINT (32 bits) |
||||
0x7001:44 Output event time 4 UDINT (32 bits) |
||||
0x7001:45 Output event time 5 UDINT (32 bits) |
||||
0x1602: MTO Outputs 2x Channel 1 |
||||
0x7001:01 Ctrl__Output buffer reset BOOL |
||||
0x7001:02 Ctrl__Manual output state BOOL |
||||
0x7001:03 Ctrl__Force order BOOL |
||||
0x7001:04 Ctrl__Enable manual operation BOOL |
||||
0x7001:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7001:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7001:21 Outputs__Output event state 1 BOOL |
||||
0x7001:22 Outputs__Output event state 2 BOOL |
||||
0x7001:41 Output event time 1 UDINT (32 bits) |
||||
0x7001:42 Output event time 2 UDINT (32 bits) |
||||
0x1603: MTO Outputs 1x Channel 1 |
||||
0x7001:01 Ctrl__Output buffer reset BOOL |
||||
0x7001:02 Ctrl__Manual output state BOOL |
||||
0x7001:03 Ctrl__Force order BOOL |
||||
0x7001:04 Ctrl__Enable manual operation BOOL |
||||
0x7001:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7001:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7001:21 Outputs__Output event state 1 BOOL |
||||
0x7001:41 Output event time 1 UDINT (32 bits) |
||||
0x1604: MTO Outputs 10x Channel 2 |
||||
0x7011:01 Ctrl__Output buffer reset BOOL |
||||
0x7011:02 Ctrl__Manual output state BOOL |
||||
0x7011:03 Ctrl__Force order BOOL |
||||
0x7011:04 Ctrl__Enable manual operation BOOL |
||||
0x7011:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7011:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7011:21 Outputs__Output event state 1 BOOL |
||||
0x7011:22 Outputs__Output event state 2 BOOL |
||||
0x7011:23 Outputs__Output event state 3 BOOL |
||||
0x7011:24 Outputs__Output event state 4 BOOL |
||||
0x7011:25 Outputs__Output event state 5 BOOL |
||||
0x7011:26 Outputs__Output event state 6 BOOL |
||||
0x7011:27 Outputs__Output event state 7 BOOL |
||||
0x7011:28 Outputs__Output event state 8 BOOL |
||||
0x7011:29 Outputs__Output event state 9 BOOL |
||||
0x7011:2a Outputs__Output event state 10 BOOL |
||||
0x7011:41 Output event time 1 UDINT (32 bits) |
||||
0x7011:42 Output event time 2 UDINT (32 bits) |
||||
0x7011:43 Output event time 3 UDINT (32 bits) |
||||
0x7011:44 Output event time 4 UDINT (32 bits) |
||||
0x7011:45 Output event time 5 UDINT (32 bits) |
||||
0x7011:46 Output event time 6 UDINT (32 bits) |
||||
0x7011:47 Output event time 7 UDINT (32 bits) |
||||
0x7011:48 Output event time 8 UDINT (32 bits) |
||||
0x7011:49 Output event time 9 UDINT (32 bits) |
||||
0x7011:4a Output event time 10 UDINT (32 bits) |
||||
0x1605: MTO Outputs 5x Channel 2 |
||||
0x7011:01 Ctrl__Output buffer reset BOOL |
||||
0x7011:02 Ctrl__Manual output state BOOL |
||||
0x7011:03 Ctrl__Force order BOOL |
||||
0x7011:04 Ctrl__Enable manual operation BOOL |
||||
0x7011:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7011:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7011:21 Outputs__Output event state 1 BOOL |
||||
0x7011:22 Outputs__Output event state 2 BOOL |
||||
0x7011:23 Outputs__Output event state 3 BOOL |
||||
0x7011:24 Outputs__Output event state 4 BOOL |
||||
0x7011:25 Outputs__Output event state 5 BOOL |
||||
0x7011:41 Output event time 1 UDINT (32 bits) |
||||
0x7011:42 Output event time 2 UDINT (32 bits) |
||||
0x7011:43 Output event time 3 UDINT (32 bits) |
||||
0x7011:44 Output event time 4 UDINT (32 bits) |
||||
0x7011:45 Output event time 5 UDINT (32 bits) |
||||
0x1606: MTO Outputs 2x Channel 2 |
||||
0x7011:01 Ctrl__Output buffer reset BOOL |
||||
0x7011:02 Ctrl__Manual output state BOOL |
||||
0x7011:03 Ctrl__Force order BOOL |
||||
0x7011:04 Ctrl__Enable manual operation BOOL |
||||
0x7011:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7011:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7011:21 Outputs__Output event state 1 BOOL |
||||
0x7011:22 Outputs__Output event state 2 BOOL |
||||
0x7011:41 Output event time 1 UDINT (32 bits) |
||||
0x7011:42 Output event time 2 UDINT (32 bits) |
||||
0x1607: MTO Outputs 1x Channel 2 |
||||
0x7011:01 Ctrl__Output buffer reset BOOL |
||||
0x7011:02 Ctrl__Manual output state BOOL |
||||
0x7011:03 Ctrl__Force order BOOL |
||||
0x7011:04 Ctrl__Enable manual operation BOOL |
||||
0x7011:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7011:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7011:21 Outputs__Output event state 1 BOOL |
||||
0x7011:41 Output event time 1 UDINT (32 bits) |
||||
0x1608: MTO Outputs 10x Channel 3 |
||||
0x7021:01 Ctrl__Output buffer reset BOOL |
||||
0x7021:02 Ctrl__Manual output state BOOL |
||||
0x7021:03 Ctrl__Force order BOOL |
||||
0x7021:04 Ctrl__Enable manual operation BOOL |
||||
0x7021:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7021:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7021:21 Outputs__Output event state 1 BOOL |
||||
0x7021:22 Outputs__Output event state 2 BOOL |
||||
0x7021:23 Outputs__Output event state 3 BOOL |
||||
0x7021:24 Outputs__Output event state 4 BOOL |
||||
0x7021:25 Outputs__Output event state 5 BOOL |
||||
0x7021:26 Outputs__Output event state 6 BOOL |
||||
0x7021:27 Outputs__Output event state 7 BOOL |
||||
0x7021:28 Outputs__Output event state 8 BOOL |
||||
0x7021:29 Outputs__Output event state 9 BOOL |
||||
0x7021:2a Outputs__Output event state 10 BOOL |
||||
0x7021:41 Output event time 1 UDINT (32 bits) |
||||
0x7021:42 Output event time 2 UDINT (32 bits) |
||||
0x7021:43 Output event time 3 UDINT (32 bits) |
||||
0x7021:44 Output event time 4 UDINT (32 bits) |
||||
0x7021:45 Output event time 5 UDINT (32 bits) |
||||
0x7021:46 Output event time 6 UDINT (32 bits) |
||||
0x7021:47 Output event time 7 UDINT (32 bits) |
||||
0x7021:48 Output event time 8 UDINT (32 bits) |
||||
0x7021:49 Output event time 9 UDINT (32 bits) |
||||
0x7021:4a Output event time 10 UDINT (32 bits) |
||||
0x1609: MTO Outputs 5x Channel 3 |
||||
0x7021:01 Ctrl__Output buffer reset BOOL |
||||
0x7021:02 Ctrl__Manual output state BOOL |
||||
0x7021:03 Ctrl__Force order BOOL |
||||
0x7021:04 Ctrl__Enable manual operation BOOL |
||||
0x7021:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7021:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7021:21 Outputs__Output event state 1 BOOL |
||||
0x7021:22 Outputs__Output event state 2 BOOL |
||||
0x7021:23 Outputs__Output event state 3 BOOL |
||||
0x7021:24 Outputs__Output event state 4 BOOL |
||||
0x7021:25 Outputs__Output event state 5 BOOL |
||||
0x7021:41 Output event time 1 UDINT (32 bits) |
||||
0x7021:42 Output event time 2 UDINT (32 bits) |
||||
0x7021:43 Output event time 3 UDINT (32 bits) |
||||
0x7021:44 Output event time 4 UDINT (32 bits) |
||||
0x7021:45 Output event time 5 UDINT (32 bits) |
||||
0x160a: MTO Outputs 2x Channel 3 |
||||
0x7021:01 Ctrl__Output buffer reset BOOL |
||||
0x7021:02 Ctrl__Manual output state BOOL |
||||
0x7021:03 Ctrl__Force order BOOL |
||||
0x7021:04 Ctrl__Enable manual operation BOOL |
||||
0x7021:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7021:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7021:21 Outputs__Output event state 1 BOOL |
||||
0x7021:22 Outputs__Output event state 2 BOOL |
||||
0x7021:41 Output event time 1 UDINT (32 bits) |
||||
0x7021:42 Output event time 2 UDINT (32 bits) |
||||
0x160b: MTO Outputs 1x Channel 3 |
||||
0x7021:01 Ctrl__Output buffer reset BOOL |
||||
0x7021:02 Ctrl__Manual output state BOOL |
||||
0x7021:03 Ctrl__Force order BOOL |
||||
0x7021:04 Ctrl__Enable manual operation BOOL |
||||
0x7021:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7021:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7021:21 Outputs__Output event state 1 BOOL |
||||
0x7021:41 Output event time 1 UDINT (32 bits) |
||||
0x160c: MTO Outputs 10x Channel 4 |
||||
0x7031:01 Ctrl__Output buffer reset BOOL |
||||
0x7031:02 Ctrl__Manual output state BOOL |
||||
0x7031:03 Ctrl__Force order BOOL |
||||
0x7031:04 Ctrl__Enable manual operation BOOL |
||||
0x7031:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7031:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7031:21 Outputs__Output event state 1 BOOL |
||||
0x7031:22 Outputs__Output event state 2 BOOL |
||||
0x7031:23 Outputs__Output event state 3 BOOL |
||||
0x7031:24 Outputs__Output event state 4 BOOL |
||||
0x7031:25 Outputs__Output event state 5 BOOL |
||||
0x7031:26 Outputs__Output event state 6 BOOL |
||||
0x7031:27 Outputs__Output event state 7 BOOL |
||||
0x7031:28 Outputs__Output event state 8 BOOL |
||||
0x7031:29 Outputs__Output event state 9 BOOL |
||||
0x7031:2a Outputs__Output event state 10 BOOL |
||||
0x7031:41 Output event time 1 UDINT (32 bits) |
||||
0x7031:42 Output event time 2 UDINT (32 bits) |
||||
0x7031:43 Output event time 3 UDINT (32 bits) |
||||
0x7031:44 Output event time 4 UDINT (32 bits) |
||||
0x7031:45 Output event time 5 UDINT (32 bits) |
||||
0x7031:46 Output event time 6 UDINT (32 bits) |
||||
0x7031:47 Output event time 7 UDINT (32 bits) |
||||
0x7031:48 Output event time 8 UDINT (32 bits) |
||||
0x7031:49 Output event time 9 UDINT (32 bits) |
||||
0x7031:4a Output event time 10 UDINT (32 bits) |
||||
0x160d: MTO Outputs 5x Channel 4 |
||||
0x7031:01 Ctrl__Output buffer reset BOOL |
||||
0x7031:02 Ctrl__Manual output state BOOL |
||||
0x7031:03 Ctrl__Force order BOOL |
||||
0x7031:04 Ctrl__Enable manual operation BOOL |
||||
0x7031:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7031:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7031:21 Outputs__Output event state 1 BOOL |
||||
0x7031:22 Outputs__Output event state 2 BOOL |
||||
0x7031:23 Outputs__Output event state 3 BOOL |
||||
0x7031:24 Outputs__Output event state 4 BOOL |
||||
0x7031:25 Outputs__Output event state 5 BOOL |
||||
0x7031:41 Output event time 1 UDINT (32 bits) |
||||
0x7031:42 Output event time 2 UDINT (32 bits) |
||||
0x7031:43 Output event time 3 UDINT (32 bits) |
||||
0x7031:44 Output event time 4 UDINT (32 bits) |
||||
0x7031:45 Output event time 5 UDINT (32 bits) |
||||
0x160e: MTO Outputs 2x Channel 4 |
||||
0x7031:01 Ctrl__Output buffer reset BOOL |
||||
0x7031:02 Ctrl__Manual output state BOOL |
||||
0x7031:03 Ctrl__Force order BOOL |
||||
0x7031:04 Ctrl__Enable manual operation BOOL |
||||
0x7031:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7031:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7031:21 Outputs__Output event state 1 BOOL |
||||
0x7031:22 Outputs__Output event state 2 BOOL |
||||
0x7031:41 Output event time 1 UDINT (32 bits) |
||||
0x7031:42 Output event time 2 UDINT (32 bits) |
||||
0x160f: MTO Outputs 1x Channel 4 |
||||
0x7031:01 Ctrl__Output buffer reset BOOL |
||||
0x7031:02 Ctrl__Manual output state BOOL |
||||
0x7031:03 Ctrl__Force order BOOL |
||||
0x7031:04 Ctrl__Enable manual operation BOOL |
||||
0x7031:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7031:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7031:21 Outputs__Output event state 1 BOOL |
||||
0x7031:41 Output event time 1 UDINT (32 bits) |
||||
0x1610: MTO Outputs 10x Channel 5 |
||||
0x7041:01 Ctrl__Output buffer reset BOOL |
||||
0x7041:02 Ctrl__Manual output state BOOL |
||||
0x7041:03 Ctrl__Force order BOOL |
||||
0x7041:04 Ctrl__Enable manual operation BOOL |
||||
0x7041:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7041:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7041:21 Outputs__Output event state 1 BOOL |
||||
0x7041:22 Outputs__Output event state 2 BOOL |
||||
0x7041:23 Outputs__Output event state 3 BOOL |
||||
0x7041:24 Outputs__Output event state 4 BOOL |
||||
0x7041:25 Outputs__Output event state 5 BOOL |
||||
0x7041:26 Outputs__Output event state 6 BOOL |
||||
0x7041:27 Outputs__Output event state 7 BOOL |
||||
0x7041:28 Outputs__Output event state 8 BOOL |
||||
0x7041:29 Outputs__Output event state 9 BOOL |
||||
0x7041:2a Outputs__Output event state 10 BOOL |
||||
0x7041:41 Output event time 1 UDINT (32 bits) |
||||
0x7041:42 Output event time 2 UDINT (32 bits) |
||||
0x7041:43 Output event time 3 UDINT (32 bits) |
||||
0x7041:44 Output event time 4 UDINT (32 bits) |
||||
0x7041:45 Output event time 5 UDINT (32 bits) |
||||
0x7041:46 Output event time 6 UDINT (32 bits) |
||||
0x7041:47 Output event time 7 UDINT (32 bits) |
||||
0x7041:48 Output event time 8 UDINT (32 bits) |
||||
0x7041:49 Output event time 9 UDINT (32 bits) |
||||
0x7041:4a Output event time 10 UDINT (32 bits) |
||||
0x1611: MTO Outputs 5x Channel 5 |
||||
0x7041:01 Ctrl__Output buffer reset BOOL |
||||
0x7041:02 Ctrl__Manual output state BOOL |
||||
0x7041:03 Ctrl__Force order BOOL |
||||
0x7041:04 Ctrl__Enable manual operation BOOL |
||||
0x7041:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7041:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7041:21 Outputs__Output event state 1 BOOL |
||||
0x7041:22 Outputs__Output event state 2 BOOL |
||||
0x7041:23 Outputs__Output event state 3 BOOL |
||||
0x7041:24 Outputs__Output event state 4 BOOL |
||||
0x7041:25 Outputs__Output event state 5 BOOL |
||||
0x7041:41 Output event time 1 UDINT (32 bits) |
||||
0x7041:42 Output event time 2 UDINT (32 bits) |
||||
0x7041:43 Output event time 3 UDINT (32 bits) |
||||
0x7041:44 Output event time 4 UDINT (32 bits) |
||||
0x7041:45 Output event time 5 UDINT (32 bits) |
||||
0x1612: MTO Outputs 2x Channel 5 |
||||
0x7041:01 Ctrl__Output buffer reset BOOL |
||||
0x7041:02 Ctrl__Manual output state BOOL |
||||
0x7041:03 Ctrl__Force order BOOL |
||||
0x7041:04 Ctrl__Enable manual operation BOOL |
||||
0x7041:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7041:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7041:21 Outputs__Output event state 1 BOOL |
||||
0x7041:22 Outputs__Output event state 2 BOOL |
||||
0x7041:41 Output event time 1 UDINT (32 bits) |
||||
0x7041:42 Output event time 2 UDINT (32 bits) |
||||
0x1613: MTO Outputs 1x Channel 5 |
||||
0x7041:01 Ctrl__Output buffer reset BOOL |
||||
0x7041:02 Ctrl__Manual output state BOOL |
||||
0x7041:03 Ctrl__Force order BOOL |
||||
0x7041:04 Ctrl__Enable manual operation BOOL |
||||
0x7041:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7041:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7041:21 Outputs__Output event state 1 BOOL |
||||
0x7041:41 Output event time 1 UDINT (32 bits) |
||||
0x1614: MTO Outputs 10x Channel 6 |
||||
0x7051:01 Ctrl__Output buffer reset BOOL |
||||
0x7051:02 Ctrl__Manual output state BOOL |
||||
0x7051:03 Ctrl__Force order BOOL |
||||
0x7051:04 Ctrl__Enable manual operation BOOL |
||||
0x7051:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7051:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7051:21 Outputs__Output event state 1 BOOL |
||||
0x7051:22 Outputs__Output event state 2 BOOL |
||||
0x7051:23 Outputs__Output event state 3 BOOL |
||||
0x7051:24 Outputs__Output event state 4 BOOL |
||||
0x7051:25 Outputs__Output event state 5 BOOL |
||||
0x7051:26 Outputs__Output event state 6 BOOL |
||||
0x7051:27 Outputs__Output event state 7 BOOL |
||||
0x7051:28 Outputs__Output event state 8 BOOL |
||||
0x7051:29 Outputs__Output event state 9 BOOL |
||||
0x7051:2a Outputs__Output event state 10 BOOL |
||||
0x7051:41 Output event time 1 UDINT (32 bits) |
||||
0x7051:42 Output event time 2 UDINT (32 bits) |
||||
0x7051:43 Output event time 3 UDINT (32 bits) |
||||
0x7051:44 Output event time 4 UDINT (32 bits) |
||||
0x7051:45 Output event time 5 UDINT (32 bits) |
||||
0x7051:46 Output event time 6 UDINT (32 bits) |
||||
0x7051:47 Output event time 7 UDINT (32 bits) |
||||
0x7051:48 Output event time 8 UDINT (32 bits) |
||||
0x7051:49 Output event time 9 UDINT (32 bits) |
||||
0x7051:4a Output event time 10 UDINT (32 bits) |
||||
0x1615: MTO Outputs 5x Channel 6 |
||||
0x7051:01 Ctrl__Output buffer reset BOOL |
||||
0x7051:02 Ctrl__Manual output state BOOL |
||||
0x7051:03 Ctrl__Force order BOOL |
||||
0x7051:04 Ctrl__Enable manual operation BOOL |
||||
0x7051:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7051:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7051:21 Outputs__Output event state 1 BOOL |
||||
0x7051:22 Outputs__Output event state 2 BOOL |
||||
0x7051:23 Outputs__Output event state 3 BOOL |
||||
0x7051:24 Outputs__Output event state 4 BOOL |
||||
0x7051:25 Outputs__Output event state 5 BOOL |
||||
0x7051:41 Output event time 1 UDINT (32 bits) |
||||
0x7051:42 Output event time 2 UDINT (32 bits) |
||||
0x7051:43 Output event time 3 UDINT (32 bits) |
||||
0x7051:44 Output event time 4 UDINT (32 bits) |
||||
0x7051:45 Output event time 5 UDINT (32 bits) |
||||
0x1616: MTO Outputs 2x Channel 6 |
||||
0x7051:01 Ctrl__Output buffer reset BOOL |
||||
0x7051:02 Ctrl__Manual output state BOOL |
||||
0x7051:03 Ctrl__Force order BOOL |
||||
0x7051:04 Ctrl__Enable manual operation BOOL |
||||
0x7051:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7051:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7051:21 Outputs__Output event state 1 BOOL |
||||
0x7051:22 Outputs__Output event state 2 BOOL |
||||
0x7051:41 Output event time 1 UDINT (32 bits) |
||||
0x7051:42 Output event time 2 UDINT (32 bits) |
||||
0x1617: MTO Outputs 1x Channel 6 |
||||
0x7051:01 Ctrl__Output buffer reset BOOL |
||||
0x7051:02 Ctrl__Manual output state BOOL |
||||
0x7051:03 Ctrl__Force order BOOL |
||||
0x7051:04 Ctrl__Enable manual operation BOOL |
||||
0x7051:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7051:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7051:21 Outputs__Output event state 1 BOOL |
||||
0x7051:41 Output event time 1 UDINT (32 bits) |
||||
0x1618: MTO Outputs 10x Channel 7 |
||||
0x7061:01 Ctrl__Output buffer reset BOOL |
||||
0x7061:02 Ctrl__Manual output state BOOL |
||||
0x7061:03 Ctrl__Force order BOOL |
||||
0x7061:04 Ctrl__Enable manual operation BOOL |
||||
0x7061:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7061:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7061:21 Outputs__Output event state 1 BOOL |
||||
0x7061:22 Outputs__Output event state 2 BOOL |
||||
0x7061:23 Outputs__Output event state 3 BOOL |
||||
0x7061:24 Outputs__Output event state 4 BOOL |
||||
0x7061:25 Outputs__Output event state 5 BOOL |
||||
0x7061:26 Outputs__Output event state 6 BOOL |
||||
0x7061:27 Outputs__Output event state 7 BOOL |
||||
0x7061:28 Outputs__Output event state 8 BOOL |
||||
0x7061:29 Outputs__Output event state 9 BOOL |
||||
0x7061:2a Outputs__Output event state 10 BOOL |
||||
0x7061:41 Output event time 1 UDINT (32 bits) |
||||
0x7061:42 Output event time 2 UDINT (32 bits) |
||||
0x7061:43 Output event time 3 UDINT (32 bits) |
||||
0x7061:44 Output event time 4 UDINT (32 bits) |
||||
0x7061:45 Output event time 5 UDINT (32 bits) |
||||
0x7061:46 Output event time 6 UDINT (32 bits) |
||||
0x7061:47 Output event time 7 UDINT (32 bits) |
||||
0x7061:48 Output event time 8 UDINT (32 bits) |
||||
0x7061:49 Output event time 9 UDINT (32 bits) |
||||
0x7061:4a Output event time 10 UDINT (32 bits) |
||||
0x1619: MTO Outputs 5x Channel 7 |
||||
0x7061:01 Ctrl__Output buffer reset BOOL |
||||
0x7061:02 Ctrl__Manual output state BOOL |
||||
0x7061:03 Ctrl__Force order BOOL |
||||
0x7061:04 Ctrl__Enable manual operation BOOL |
||||
0x7061:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7061:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7061:21 Outputs__Output event state 1 BOOL |
||||
0x7061:22 Outputs__Output event state 2 BOOL |
||||
0x7061:23 Outputs__Output event state 3 BOOL |
||||
0x7061:24 Outputs__Output event state 4 BOOL |
||||
0x7061:25 Outputs__Output event state 5 BOOL |
||||
0x7061:41 Output event time 1 UDINT (32 bits) |
||||
0x7061:42 Output event time 2 UDINT (32 bits) |
||||
0x7061:43 Output event time 3 UDINT (32 bits) |
||||
0x7061:44 Output event time 4 UDINT (32 bits) |
||||
0x7061:45 Output event time 5 UDINT (32 bits) |
||||
0x161a: MTO Outputs 2x Channel 7 |
||||
0x7061:01 Ctrl__Output buffer reset BOOL |
||||
0x7061:02 Ctrl__Manual output state BOOL |
||||
0x7061:03 Ctrl__Force order BOOL |
||||
0x7061:04 Ctrl__Enable manual operation BOOL |
||||
0x7061:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7061:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7061:21 Outputs__Output event state 1 BOOL |
||||
0x7061:22 Outputs__Output event state 2 BOOL |
||||
0x7061:41 Output event time 1 UDINT (32 bits) |
||||
0x7061:42 Output event time 2 UDINT (32 bits) |
||||
0x161b: MTO Outputs 1x Channel 7 |
||||
0x7061:01 Ctrl__Output buffer reset BOOL |
||||
0x7061:02 Ctrl__Manual output state BOOL |
||||
0x7061:03 Ctrl__Force order BOOL |
||||
0x7061:04 Ctrl__Enable manual operation BOOL |
||||
0x7061:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7061:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7061:21 Outputs__Output event state 1 BOOL |
||||
0x7061:41 Output event time 1 UDINT (32 bits) |
||||
0x161c: MTO Outputs 10x Channel 8 |
||||
0x7071:01 Ctrl__Output buffer reset BOOL |
||||
0x7071:02 Ctrl__Manual output state BOOL |
||||
0x7071:03 Ctrl__Force order BOOL |
||||
0x7071:04 Ctrl__Enable manual operation BOOL |
||||
0x7071:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7071:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7071:21 Outputs__Output event state 1 BOOL |
||||
0x7071:22 Outputs__Output event state 2 BOOL |
||||
0x7071:23 Outputs__Output event state 3 BOOL |
||||
0x7071:24 Outputs__Output event state 4 BOOL |
||||
0x7071:25 Outputs__Output event state 5 BOOL |
||||
0x7071:26 Outputs__Output event state 6 BOOL |
||||
0x7071:27 Outputs__Output event state 7 BOOL |
||||
0x7071:28 Outputs__Output event state 8 BOOL |
||||
0x7071:29 Outputs__Output event state 9 BOOL |
||||
0x7071:2a Outputs__Output event state 10 BOOL |
||||
0x7071:41 Output event time 1 UDINT (32 bits) |
||||
0x7071:42 Output event time 2 UDINT (32 bits) |
||||
0x7071:43 Output event time 3 UDINT (32 bits) |
||||
0x7071:44 Output event time 4 UDINT (32 bits) |
||||
0x7071:45 Output event time 5 UDINT (32 bits) |
||||
0x7071:46 Output event time 6 UDINT (32 bits) |
||||
0x7071:47 Output event time 7 UDINT (32 bits) |
||||
0x7071:48 Output event time 8 UDINT (32 bits) |
||||
0x7071:49 Output event time 9 UDINT (32 bits) |
||||
0x7071:4a Output event time 10 UDINT (32 bits) |
||||
0x161d: MTO Outputs 5x Channel 8 |
||||
0x7071:01 Ctrl__Output buffer reset BOOL |
||||
0x7071:02 Ctrl__Manual output state BOOL |
||||
0x7071:03 Ctrl__Force order BOOL |
||||
0x7071:04 Ctrl__Enable manual operation BOOL |
||||
0x7071:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7071:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7071:21 Outputs__Output event state 1 BOOL |
||||
0x7071:22 Outputs__Output event state 2 BOOL |
||||
0x7071:23 Outputs__Output event state 3 BOOL |
||||
0x7071:24 Outputs__Output event state 4 BOOL |
||||
0x7071:25 Outputs__Output event state 5 BOOL |
||||
0x7071:41 Output event time 1 UDINT (32 bits) |
||||
0x7071:42 Output event time 2 UDINT (32 bits) |
||||
0x7071:43 Output event time 3 UDINT (32 bits) |
||||
0x7071:44 Output event time 4 UDINT (32 bits) |
||||
0x7071:45 Output event time 5 UDINT (32 bits) |
||||
0x161e: MTO Outputs 2x Channel 8 |
||||
0x7071:01 Ctrl__Output buffer reset BOOL |
||||
0x7071:02 Ctrl__Manual output state BOOL |
||||
0x7071:03 Ctrl__Force order BOOL |
||||
0x7071:04 Ctrl__Enable manual operation BOOL |
||||
0x7071:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7071:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7071:21 Outputs__Output event state 1 BOOL |
||||
0x7071:22 Outputs__Output event state 2 BOOL |
||||
0x7071:41 Output event time 1 UDINT (32 bits) |
||||
0x7071:42 Output event time 2 UDINT (32 bits) |
||||
0x161f: MTO Outputs 1x Channel 8 |
||||
0x7071:01 Ctrl__Output buffer reset BOOL |
||||
0x7071:02 Ctrl__Manual output state BOOL |
||||
0x7071:03 Ctrl__Force order BOOL |
||||
0x7071:04 Ctrl__Enable manual operation BOOL |
||||
0x7071:09 Ctrl__Output order counter USINT (8 bits) |
||||
0x7071:11 Ctrl__No of output events USINT (8 bits) |
||||
0x7071:21 Outputs__Output event state 1 BOOL |
||||
0x7071:41 Output event time 1 UDINT (32 bits) |
||||
0x1620: MTI Outputs Channel 1 |
||||
0x7080:01 Ctrl__Input buffer reset BOOL |
||||
0x7080:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1621: MTI Outputs Channel 2 |
||||
0x7090:01 Ctrl__Input buffer reset BOOL |
||||
0x7090:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1622: MTI Outputs Channel 3 |
||||
0x70a0:01 Ctrl__Input buffer reset BOOL |
||||
0x70a0:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1623: MTI Outputs Channel 4 |
||||
0x70b0:01 Ctrl__Input buffer reset BOOL |
||||
0x70b0:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1624: MTI Outputs Channel 5 |
||||
0x70c0:01 Ctrl__Input buffer reset BOOL |
||||
0x70c0:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1625: MTI Outputs Channel 6 |
||||
0x70d0:01 Ctrl__Input buffer reset BOOL |
||||
0x70d0:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1626: MTI Outputs Channel 7 |
||||
0x70e0:01 Ctrl__Input buffer reset BOOL |
||||
0x70e0:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1627: MTI Outputs Channel 8 |
||||
0x70f0:01 Ctrl__Input buffer reset BOOL |
||||
0x70f0:11 Ctrl__Input order counter USINT (8 bits) |
||||
0x1628: TSO Outputs Channel 1 |
||||
0x7100:01 Output BOOL |
||||
0x7100:11 Activate USINT (8 bits) |
||||
0x7100:41 StartTime ULINT (64 bits) |
||||
0x1629: TSO Outputs Channel 2 |
||||
0x7110:01 Output BOOL |
||||
0x7110:11 Activate USINT (8 bits) |
||||
0x7110:41 StartTime ULINT (64 bits) |
||||
0x162a: TSO Outputs Channel 3 |
||||
0x7120:01 Output BOOL |
||||
0x7120:11 Activate USINT (8 bits) |
||||
0x7120:41 StartTime ULINT (64 bits) |
||||
0x162b: TSO Outputs Channel 4 |
||||
0x7130:01 Output BOOL |
||||
0x7130:11 Activate USINT (8 bits) |
||||
0x7130:41 StartTime ULINT (64 bits) |
||||
0x162c: TSO Outputs Channel 5 |
||||
0x7140:01 Output BOOL |
||||
0x7140:11 Activate USINT (8 bits) |
||||
0x7140:41 StartTime ULINT (64 bits) |
||||
0x162d: TSO Outputs Channel 6 |
||||
0x7150:01 Output BOOL |
||||
0x7150:11 Activate USINT (8 bits) |
||||
0x7150:41 StartTime ULINT (64 bits) |
||||
0x162e: TSO Outputs Channel 7 |
||||
0x7160:01 Output BOOL |
||||
0x7160:11 Activate USINT (8 bits) |
||||
0x7160:41 StartTime ULINT (64 bits) |
||||
0x162f: TSO Outputs Channel 8 |
||||
0x7170:01 Output BOOL |
||||
0x7170:11 Activate USINT (8 bits) |
||||
0x7170:41 StartTime ULINT (64 bits) |
||||